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  absolute maximum ratings symbol parameter value units v dss drain to source voltage 600 v i d continuous drain current(@t c = 25 c) 2.4 a continuous drain current(@t c = 100 c) 1.5 a i dm drain current pulsed (note 1) 9.6 a v gs gate to source voltage 30 v e as single pulsed avalanche energy (note 2) 150 mj e ar repetitive avalanche energy (note 1) 6.4 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d total power dissipation(@t c = 25 c) 64 w derating factor above 25 c 0.50 w/c t stg, t j operating junction temperature & storage temperature - 55 ~ 150 c t l maximum lead temperature for soldering purpose, 1/8 from case for 5 seconds. 300 c thermal characteristics symbol parameter value units min. typ. max. r jc thermal resistance, junction-to-case - - 1.95 c/w r cs thermal resistance, case to sink 0.5 - c/w r ja thermal resistance, junction-to-ambient - - 62.5 c/w may, 2006, rev. 2 1/7 copyright@ d&i semiconductor co., ltd., korea. all rights reserved. DFP2N60 features high ruggedness r ds(on) (max 5.5 ? )@v gs =10v gate charge (typical 15nc) improved dv/dt capability 100% avalanche tested n-channel mosfet { { { ? { { { ? 2. drain 3. source 1. gate r ds(on) = 5.5 ohm i d = 2.4a bv dss = 600v general description this n-channel enhancement mode field-effect power transistor using di semiconductor?s advanc ed planar stripe, dmos technol- ogy intended for off-line switch mode power supply. also, especially designed to minimize rds(on) and high rugged avalanche characteristics. the to-2 20f pak pkg is well suited for charger smps and small power inverter application. to-220 1 2 3
electrical characteristics ( t c = 25 c unless otherwise noted ) symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0v, i d = 250ua 600 - - v bv dss / t j breakdown voltage temperature coefficient i d = 250ua, referenced to 25 c - 0.4 - v/c i dss drain-source leakage current v ds = 600v, v gs = 0v --10ua v ds = 480v, t c = 125 c --100ua i gss gate-source leakage, forward v gs = 30v, v ds = 0v --100na gate-source leakage, reverse v gs = -30v, v ds = 0v - - -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250ua 2.0 - 4.0 v r ds(on) static drain-source on-state resis- tance v gs =10 v, i d = 1.0a -4.55.5 ? dynamic characteristics c iss input capacitance v gs =0 v, v ds =25v, f = 1mhz - 570 720 pf c oss output capacitance - 150 215 c rss reverse transfer capacitance - 310 450 dynamic characteristics t d(on) turn-on delay time v dd =300v, i d =2.4a, r g =25 ? see fig. 13. (note 4, 5) - 15 35 ns t r rise time - 75 140 t d(off) turn-off delay time - 30 60 t f fall time - 35 60 q g total gate charge v ds =480v, v gs =10v, i d =2.4a see fig. 12. (note 4, 5) - 15 20 nc q gs gate-source charge - 1.6 - q gd gate-drain charg e(miller charge) - 6- source-drain diode ratings and characteristics symbol parameter test conditions min. typ. max. unit. i s continuous source current integral reverse p-n junction diode in the mosfet --2.0 a i sm pulsed source current - - 8.0 v sd diode forward voltage i s =2.4a, v gs =0v - - 1.4 v t rr reverse recovery time i s =2.4a, v gs =0v, di f /dt=100a/us -820- ns q rr reverse recovery charge - 0.82 - uc DFP2N60 notes 1. repeativity rating : pulse width limited by junction temperature 2. l = 47mh, i as =2.4a, v dd = 50v, r g = 50 ? , starting t j = 25c 3. i sd 2.4 , di/dt 300a/us, v dd bv dss , starting t j = 25c 4. pulse test : pulse width 300us, duty cycle 2% 5. essentially independent of operating temperature. 2/7
0481216 0 2 4 6 8 10 12 v ds = 120v v gs , gate-source voltage [v] v ds = 300v v ds = 480v note : i d = 2.4 a q g , total gate charge [nc] 0 5 10 15 20 25 30 35 40 0 250 500 750 c iss =c gs +c gd (c ds =shorted) c oss =c ds +c gd c rss =c gd notes : 1. v gs = 0v 2. f=1mhz c iss c oss c rss capacitance [pf] v ds , drain-source voltage [v] 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 10 -1 10 0 10 1 150 notes : 1. v gs = 0v 2. 250 s pulse test 25 i dr , reverse drain current [a] v sd , source-drain voltage [v] 0123456 0 2 4 6 8 10 12 v gs = 20v v gs = 10v note : t j = 25 r ds(on) , drain-source on-resistance [ ? ] i d , drain current [a] 2345678910 10 -1 10 0 10 1 150 o c 25 o c -55 o c notes : 1. v ds = 50v 2. 250 s pulse test i d , drain current [a] v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 -2 10 -1 10 0 10 1 notes : 1. 250 s pulse test 2. t c = 25 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v i d , drain current [a] v ds , drain-source voltage [v] fig 4. on state current vs. allowable case temperature fig 5. capacitance characteristics ( non-repetitive ) fig 6. gate charge characteristics DFP2N60 fig 1. on-state characteristics fig 2. transfer characteristics fig 3. on resistance variation vs. drain current and gate voltage 3/7
25 50 75 100 125 150 0.0 0.5 1.0 1.5 2.0 2.5 t c' case temperature [ o c] i d' drain current [a] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 notes : 1. z jc (t) = 1.95 /w max. 2. duty factor, d =t 1 /t 2 3. t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] 10 0 10 1 10 2 10 3 10 -2 10 -1 10 0 10 1 10 2 dc 10 ms 1 ms 100 s operation in this area is limited by r ds(on) notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 notes : 1. v gs = 10 v 2. i d = 1.2 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 notes : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] fig 9. maximum safe operating area fig 10. maximum drain current vs. case temperature fig 7. breakdown voltage variation vs. junction temperature fig 8. on-resistance variation vs. junction temperature DFP2N60 4/7 fig 11. transient thermal response curve
DFP2N60 5/7 fig 13. switching time test circuit & waveforms fig 14. unclamped inductive swit ching test circuit & waveforms fig. 12. gate charge test circuit & waveforms 12v 200nf 50ko 300nf v gs 1ma same type as dut dut v ds v gs charge q g q gs q gd pulse generator 10v r g v ds r l v dd (0.5 rated v ds ) dut v ds v in 90% 10% t d(on) t r t d(off) t f t on t off time 10v v ds r g v ds (t) dut bv dss l i d v dd i d (t) i as e as =l l i as 2 bv dss bv dss - v dd 1 2 t p
DFP2N60 dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i s controlled by pulse period v d d l l i s i s fig. 15. peak diode recovery dv/dt test circuit & waveforms 10 v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward volta g e dro p v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- 10 v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward volta g e dro p v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period -------------------------- 6/7
DFP2N60 7/7 to-220 package dimension


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